This directory contains the "top level" structural model for the
Am29C01.  The various subcomponents are instantiated in the file
Am29C01.vhd.  

"AM29C01_TB" is the top-level design unit.  Simulate this unit after
all subcomponents have been analyzed into the proper logical
libraries.  You should obtain results identical to the Am29C01_out.dat
file.

Two output files are included:

  (1) Am29C01_out.dat  -- this is the output from the WAVES test
      bench.

  (2) report.dat -- the same output as (1), except address and data
      buses have been converted to hex, and control lines have been
      decoded into mnemonics for ease of readability.

